Quick-turnaround ASIC design in VHDL : core-based behavioral synthesis / Mohamed S. Ben Romdhane, Vijay K. Madisetti, John W. Hines.
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TextSeries: Kluwer international series in engineering and computer science ; SECS 367. | Kluwer international series in engineering and computer science. VLSI, computer architecture, and digital signal processing.Publication details: Boston : Kluwer Academic Publishers, c1996. Description: xviii, 180 p. : ill. ; 25 cmISBN: 0792397444 (acid₋free paper)Subject(s): Application specific integrated circuits -- Design -- Data processing | VHDL (Computer hardware description language) | Computer-aided designDDC classification: 621.382/2/0285 LOC classification: TK7874.6 | .R66 1996
| Item type | Current library | Call number | Status | Date due | Barcode |
|---|---|---|---|---|---|
| Book | UDOM Library - Collection of Informatics and Virtual Education | TK7874.6 .R66 1996 (Browse shelf(Opens below)) | Available | 944 |
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| TK7874 .W635 1986 Silicon processing for the VLSI era / | TK7874 .W635 1986 Silicon processing for the VLSI era / | TK7874 .W635 1986 Silicon processing for the VLSI era / | TK7874.6 .R66 1996 Quick-turnaround ASIC design in VHDL : core-based behavioral synthesis / | TK7874.6 .S965 2002 System-on-chip for real-time applications / | TK7874.6 .V57 1994 VLSI design methodologies for digital signal processing architectures / | TK7874.6 .W45 1992 Logic design for array-based circuits : a structured design methodology / |
Includes bibliographical references (p. 171-177) and index.
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